Leica M Typ 240 / M240 and CMOSIS
Too bad the CHR70M 70-megapixel CMOSIS sensor wasn’t chosen for the Leica M Typ 240 (M700?). Leica is apparently using a CMOSIS sensor similar to the one used in the Blackmagic video camera, but tuned for stills—and not so much—the 15-stop dynamic range feature has gone missing.
The CHR70M is a high resolution CMOS image sensor with 10000 by 7096 pixels. The image array consists of 3.1μm x 3.1μm pinned diode pixels which share a number of transistors (2 pixels sharing). The image sensor has 8 analog outputs, each running at 30MHz. This results in a frame rate of 3fps at full resolution. Higher frame rates can be achieved in windowing mode or subsampling mode.
I’m sure there are valid reasons (perhaps ray angle and micro lens issues), but I’d rather have 70 megapixels with some compromises and oddities than another me too 24 megapixel sensor.
Well, what about the monochrome version of the CHR70M, which is what the Leica M Monochrom ought to have. Now that would actually make a monochrome M worth paying for. For that matter, what about a Leica MM with the nice new LCD found in the M240? Just some improvements of that nature would be helpful, even if something as basic as a quality high-res LCD that can zoom and scroll quickly with high quality in order to check focus, instead of some relic low-res screen circa 2007.
CMOSIS CHR70M SENSOR FEATURES
• Electronic rolling shutter
• 10000 (H) * 7096 (V) active pixels on a 3.1μm pitch • 3 frames/sec at full resolution
• ROI capability - moving window functionality
• Master clock 30MHz
• 8 analog outputs @ 30MHz
• On-chip timing generation
• SPI-control
• 3.3V signaling
• Monochrome and Bayer (RGB) configuration
• Ceramic PGA package (65 pins)
• 2 sided AR-coated cover glass lid
Erik K writes:
If we look at the 70MP chip the spec sheet says 63 dB (13000 e- FWC and 7 e- RMS)
https://www.cmosis.com/products/standard_products/chr70m
I make this 10.85 EV. Binning 4 pixels into one would give 12.85 eV at 17.5 MP.
If we assume 7e- readout noise, it would take an FWC of 230000 e-. If we assume that 3.1 microns yield 13000 e-, the pixel size would need to increase to 13 microns. on a 24x36 chip 13 microns would yield 5.1 MP so 5-6MP would be possible with a DR of 15EV and existing CMOSIS technology.
DIGLLOYD: This is not my forte, but I expect we’ll see 15-bit imagery at full resolution before long; the Nikon D800E is only ~1.2 stops way from that goal.
